The present invention relates to pre-aligning of semiconductor objects and, more particularly, to a method and apparatus for pre-aligning a semiconductor object, such as a semiconductive wafer.
In the semiconductor industry it is common to pre-align a semiconductive wafer as part of readying the same for processing, such as the fabrication of integrated circuitry, as well as during such processing. The pre-alignment operation typically includes locating and precisely positioning the geometric center of the wafer, and placing such wafer in a selected orientation related to the orientation of its crystalline structure. This pre-alignment is typically provided in a separate operation before a wafer is transported to apparatus for providing a desired finishing or processing step. Moreover, such finishing and/or processing step may require a greater degree of alignment accuracy than is possible while the wafer is being moved. For example, during the processing of a wafer to make integrated circuitry it will be recognized that very precise alignment between a wafer and a photolithography mask must be achieved right at the photographic station. It is for these reasons that the apparatuses and methods to which the invention relates generally are referred to as "pre-alignment" apparatuses and methods rather than "alignment" apparatuses and methods.
A wafer typically is transported to a prealignment station by a robot paddle or the like. For example, when a wafer is removed for processing from a transportation carrier at an integrated circuitry fabrication plant, it is pre-aligned. A robot removes the individual wafers from the transportation carrier and places them at the pre-alignment station. After being pre-aligned, i.e., after the wafer is properly oriented and its geometric center is located, it is placed in a processing carrier in the pre-aligned condition.
It will be appreciated from the above that precise pre-alignment not only is desirable but can be a major factor in determining ultimate reliability of the integrated circuitry produced on a wafer. Many operations require very accurate alignment, and accurate pre-alignment reduces the mechanical and operational constraints in achieving such alignment.
Pre-alignment of the center of a wafer was achieved in the not too distant past by actually contacting the edge of the wafer to move the wafer as necessary to place its center in a specified position. Such edge contact resulted in the generation of particles which contaminated the active surface, i.e., the surface of the wafer to have integrated surface formed on the same. Because such contamination cannot be tolerated in most situations, those in the art have turned to non-contact, edge sensing with the only physical contact with the wafer occurring at its inactive surface. Examples of the same can be found in U.S. Pat. Nos. 4,457,664 issued Jul. 3, 1984 and 4,765,793 issued Aug. 23, 1988. European patent application No. 88101813.9 published Aug. 17, 1988 (Publication No. 0 278 462) also discloses an edge sensing pre-alignment apparatus.
It should be noted that some efforts have been made to obtain higher accuracy in the pre-alignment stage. Generally, though, there is macro-transportation of a wafer during the pre-alignment process. Macro-transportation, particularly by the same means which provides pre-alignment, results in inaccuracies. Furthermore, most pre-alignment processes require disengagement between the wafer and the chuck or other wafer engagement means during the pre-alignment process. This disengagement typically results in slight inaccuracies creeping in, because of differing spatial relationships between the chuck and wafer during the pre-alignment operation. It should be noted that in some instances, such as with the apparatus described in the European patent publication identified above, the calculations for centering determined at one station are transmitted to another station. This approach has the same problem in the sense that there is a disengagement of the engagement means (albeit more than one chuck) from the wafer during pre-alignment.